One technique for implementing a zener diode in an integrated circuit involves the provision of spaced and alternating n+ and p+ regions in an n-well or p-well. A variation is to provide a p-base (shallow p-well) around the p+ regions in an n-well, or an n-base around the n+ regions in a p-well. The p+ regions are interconnected and serve as the anode, and the n+ regions are interconnected and serve as a cathode.
Where a particular application requires a zener diode with a specified breakdown voltage, a design criteria is to realize the specified breakdown voltage, while using the smallest possible area in the integrated circuit. Stated differently, for a given area of the integrated circuit, a design criteria is to implement a zener diode with the highest possible breakdown voltage.
A further design criteria is to decrease the power dissipated in the zener diode when it is forward biased. Since power is defined to be the product of voltage and current, there must be efficient current conductivity for a given forward bias voltage, which means reduced resistance to current flowing through the diode for a given voltage. Stated differently, it is desirable to achieve a lower operational voltage across the diode for a given current flow through the diode.